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200mm
    • A size of silicon wafer approximately 8 inches in diameter. Also used to refer to a tool designed to process wafers of this size.
300mm
    • A size of silicon wafer approximately 12 inches in diameter. Also used to refer to a tool designed to process wafers of this size.
A
ABATEMENT
    • A process where toxic or other hazardous substances are removed from a liquid or gas. Examples include removing copper particles from CMP slurry or converting liquid or gaseous toxic effluents into safe forms for disposal.
ACCUMULATOR
    • A storage unit used to temporarily store work-in-progress in a manufacturing line.
ADVANCED PROCESS CONTROL (APC) ALD (ATOMIC LAYER DEPOSITION)
    • A thin film deposition technique where material is deposited a fraction of a monolayer of material at a time.
ALPS (Advanced Low-Pressure Source)
    • A PVD process performed at low pressure and large target-to-wafer distance to create a directional flux of deposited species.
ALTERNATING APERTURE PHASE SHIFT MASK (AAPSM or alt-APSM)
    • A type of PSM that has regions of the quartz substrate etched to different depths so as to introduce a 180 degree phase shift in the transmitted light to improve the contrast and thus the resolution of the projected image on the wafer.
ALUMINIUM INTERCONNECT
    • Aluminum pathways within a microchip that make connections between the transistors and other circuit elements.
AMORPHOUS SILICON
    • A type of silicon deposited without a crystal structure. In PV, amorphous silicon is an important thin film technology.
ANGSTROM (Å)
    • A unit of length; one ten-billionth of a meter.
ANNEAL
    • A high-temperature processing step designed to repair defects in the crystal structure of the wafer or induce phase transformations.
APC (AUTOMATED PROCESS CONTROL) APF (ADVANCED PATTERNING FILMS) ARC (ANTI-REFLECTIVE COATING)
    • A light-absorbing layer (typically titanium nitride), deposited on top of metal or polysilicon, to improve lithography performance.
ASPECT RATIO
    • The ratio of depth to width of a via or contact structure.
ATTENUATED PHASE SHIFT MASK (APSM)
    • A type of PSM that allows a small amount of light to be transmitted through certain regions to interfere with the light coming from transparent parts of the mask, with the goal again of improving the contrast on the wafer.
AUTOCLAVE
    • In PV module manufacturing, an autoclave is used to remove trapped air and improve adhesion between laminating film and glass substrates by subjecting the module to elevated temperature and pressure.
AUTOMATIC DEFECT CLASSIFICATION (ADC)
    • A technique employed by wafer inspection systems whereby defects are placed into several categories based on their physical and optical properties.
B
BACK CONTACT
    • A metallic layer that covers the entire back surface of a solar cell and acts as a conductor.
BACK GLASS
    • The bottom layer of a thin film solar module, which provides rigidity and electrical insulation. Current is extracted from the module through the junction box that is attached to the circuit through a hole in the back glass.
BALANCE OF SYSTEM (BOS)
    • The components in addition to solar modules necessary to make a functioning solar PV generating system, including a mounting structure, cabling, inverters, land and maintenance.
BARRIER
    • A physical layer designed to prevent intermixing of the layers above and below the barrier layer.
BEOL (BACK-END OF LINE)
    • The series of process steps after transistor fabrication through completion of the wafer, prior to electrical test. Also known as the back-end of semiconductor manufacturing. The term back end is also used to refer to those parts of chip manufacturing after the wafer is complete, i.e. dicing, packaging and test.
BINARY MASK
    • A photomask covered with a pattern defined with a light-absorbing film, typically of chromium. This is the simplest type of mask, lacking phase-shifting features of PSM and ASPM mask types.
BPSG (BOROPHOSPHOSILICATE GLASS)
    • An amorphous insulating material made by doping SiO2 with boron and phosphorus to improve moisture resistance and reflow characteristics.
BUSS LINE
    • In a thin film PV module, relatively large conductive ribbons that collect power from individual solar cells.
C
CD-SEM (CRITICAL DIMENSION SCANNING ELECTRON MICROSCOPE) Cd-Te
    • A category of thin-film solar cells that uses a cadmium-tellurium compound as the light-converting active layer.
CHIP
    • A complete integrated circuit, named after the small piece of silicon upon which the circuit has been fabricated.
CIS (CIGS)
    • Copper Indium Diselenide: a type of thin film solar cell material that uses a compound of copper, indium, selenium. A fourth element, gallium, may also be added to the compound (CIGS) to achieve higher efficiency.
CLEANROOM
    • An area in a fab where the air is conditioned to remove airborne particles that could prevent the correct function of semiconductor devices.
CMOS (COMPLIMENTARY METAL OXIDE SEMICONDUCTOR)
    • A MOS device consisting of paired p-channel and n-channel transistors.
CMP (CHEMICAL MECHANICAL PLANARIZATION)
    • A process that uses an abrasive, chemically active slurry to physically abrade the microscopic topographic features on a partly processed wafer so that subsequent processes can begin from a flat surface. Also referred to as chemical mechanical polishing.
COLOR FILTER
    • A layer of an LCD flat panel display that is divided into transparent areas of red, green and blue, each of which overlays a transistor which is switched on an off to the full range of colors.
COMPUTER INTEGRATED MANUFACTURING (CIM)
    • A manufacturing approach using computers to control the entire production process, allowing individual steps to exchange information and initiate actions.
CONDUCTOR
    • A material that contains mobile charge carriers, such as electrons or ions.
CONTACT
    • A feature on a chip that forms the electrical pathway between the first interconnect layer and the transistor. This area is often filled with tungsten.
COPPER INTERCONNECT
    • An interconnect structure using copper as the conducting material, providing improved device speed and lower power consumption compared with aluminum interconnects.
COPPER SEED LAYER CRYSTALLINE
    • A material that has atoms arranged in an ordered periodic array.
CRYSTALLINE SILICON (c-Si)
    • A generic term for solar cell technology that uses a substrate of purified silicon in a crystalline structure.
CVD (CHEMICAL VAPOR DEPOSITION)
    • A process for depositing thin films by exposing the substrate to one or more volatile precursors, which react and/or decompose on the substrate surface.
D
DAMASCENE
    • A means of creating copper metal interconnects by over-filling trenches in the interlayer dielectric using ECP then using CMP to remove the excess copper.
DARC (DIELECTRIC ANTI-REFLECTIVE COATING)
    • A non-reflective, non-energy-absorbing, inorganic dielectric layer deposited on top of metal or polysilicon to improve lithography performance.
DEEP ULTRAVIOLET (DUV)
    • The portion of the ultraviolet light spectrum with wavelengths below 300nm.
DEFECT INSPECTION
    • A process where defects are located on a patterned wafer. A list of defect locations is created and passed to a DR-SEM for review and classification.
DEFECT REVIEW SCANNING ELECTRON MICROSCOPE (DR-SEM)
    • A type of scanning electron microscope used to classify defect types during the wafer manufacturing process and determine whether these defects will affect chip yields.
DEPOSITION
    • A process used to deposit a thin layer of insulating or conductive material onto the substrate.
DESIGN RULES
    • Rules that outline geometry and connectivity restrictions for the design and layout of integrated circuits.
DIE
    • In semiconductor manufacturing, the area of the silicon wafer on which a functional circuit is fabricated. Many hundreds of identical dies (alternative plurals are die and dice) are fabricated on each wafer.
DIELECTRIC
    • An insulator that may be polarized by an applied electric field. Two dielectrics commonly used in semiconductor processing are silicon dioxide (SiO2) and silicon nitride (Si3N4).
DOPANT
    • An impurity added in controlled amounts to a material in order to modify some intrinsic characteristic, such as resistivity or melting point. The addition of a dopant to a semiconductor creates a material with predominantly negative (n type) or positive (p type) charge carriers depending on the dopant species.
DOPING
    • The process of adding dopants to a material.
DOUBLE PATTERNING
    • A class of patterning techniques designed to increase the density of circuit features that can be produced on the wafer beyond what the normal limits of a particular lithography stepper. See pitch-halving and SADP.
DPN (DECOUPLED PLASMA NITRIDATION)
    • a method that uses inductive coupling to generate nitrogen plasma and incorporate nitrogen into the top surface layer of an ultra-thin gate oxide to increase the dielectric constant of the gate dielectric.
DPS (DECOUPLED PLASMA SOURCE)
    • A type of ICP plasma source used primarily for etch applications that separates the management of plasma density and ion energy, resulting in high etch rate and minimal plasma damage to the substrate.
DRAIN
    • The output terminal of a FET.
DUAL DAMASCENE
    • A Damascene process designed to form and fill two features with copper at once, e.g., a trench overlying a via may both be filled with a single copper deposition step.
E
EFFICIENCY
    • In solar PV technology, the fraction of incident solar energy that is converted to electrical energy.
ELECTROCHEMICAL PLATING (ECP)
    • A deposition process in which metals are removed from a chemical solution and deposited on a charged surface. Also referred to as electroplating, electrodeposition or electrochemical deposition.
EOT (EQUIVALENT OXIDE THICKNESS)
    • A number used to compare performance of gate dielectric materials by indicating how thick a silicon oxide film would need to be to produce the same effect as the dielectric material being used.
EPITAXY (EPI)
    • A method of depositing, or growing, a monocrystalline film where the deposited film takes on a lattice structure and orientation identical to those of the substrate. This enables a high-purity starting point for building a semiconductor device.
EPT (EQUIPMENT PERFORMANCE TRACKING)
    • An APC technique that monitors processing tools to provides visual and statistical reporting tools to identify bottlenecks and improve factory performance.
ETCH
    • A process for removing material in a specified area through a chemical reaction or physical bombardment. The process can be performed using liquid-phase (wet) etchants or under vacuum (dry) typically using a plasma to generate gas-phase reactants.
ETCH RATE
    • The rate at which material is removed during etch processing, typically expressed in Å/s or nm/s.
ETCH STOP LAYER (ESL)
    • A film layer used to restrict etch depth and protect underlying material. The ESL is chosen to be resistant to the etch chemistry being used.
EUVL (EXTREME ULTRAVIOLET LITHOGRAPHY)
    • A lithography technique using 13.5nm EUV illumination. It represents a significant departure from DUV lithography because all the optical elements must act in a reflective mode and the entire optical system must be kept under vacuum.
F
FAB
    • Common name for a semiconductor fabrication plant, a factory used to manufacture integrated circuits.
FDC (FAULT DETECTION AND CLASSIFICATION)
    • An APC technique that uses process state models to deduce the occurrence and location of a fault condition and diagnose the cause of the fault.
FEOL (FRONT-END OF LINE)
    • The first portion of integrated circuit fabrication including transistor fabrication. FEOL generally covers everything up to (but not including) the deposition of contacts and metal interconnect layers. The term front end is sometimes used to refer the entire process to completed wafers.
FET (field effect transistor)
    • a type of transistor that relies on an electric field to control the flow of charge carriers in a semiconductor material.
FI (FACTORY INTERFACE)
    • An ultra-clean enclosure mounted to the front of a semiconductor processing system that transfers wafers to and from the cleanroom environment and the interior of the system.
FLAT PANEL DISPLAY (FPD)
    • Any consumer display device, such as an LCD, with a planar surface, in contrast to the curved front of cathode ray tube displays.
FSG (FLUORINE-DOPED SILICATE GLASS)
    • An amorphous insulating material (k=approximately 3.5) made by doping SiO2 with fluorine often used in between copper interconnect layers. Also called fluorosilicate glass.
G
GATE
    • A terminal of a FET that controls the flow of current between the source and drain terminals.
GATE STACK
    • Collective term for the conductive and insulating layers that comprise the gate structure in a MOSFET.
H
HARD MASK
    • A mask that is more resistant than photoresist to etching, used when higher etch selectivity is required than can be achieved using photoresist.
HDP (HIGH DENSITY PLASMA)
    • A plasma featuring high concentration of free electrons, and hence, high concentration of ions.
HDP-CVD (HIGH DENSITY PLASMA CHEMICAL VAPOR DEPOSITION)
    • A type of plasma-enhanced CVD performed under high vacuum and at high plasma excitation voltage in order to improve the ability to fill small high aspect ratio structures.
I
ICP (INDUCTIVELY COUPLED PLASMA)
    • A type of plasma source in which the energy is supplied by electrical currents which are produced by electromagnetic induction, that is, by time-varying magnetic fields generally applied from outside the vacuum enclosure.
IMMERSION LITHOGRAPHY
    • A lithography resolution enhancement technique that replaces the usual air gap between the final lens and the wafer surface with a liquid medium such as water.
IMPLANT INSULATOR
    • Nonconductive materials used to isolate electrically active areas of the device or chip from one another. Some commonly used insulators are silicon dioxide, silicon nitride, BPSG, and PSG.
INTEGRATED CIRCUIT (IC)
    • An electronic device that consists of many elements fabricated together on a single silicon substrate.
INTERCONNECT
    • The wiring in an integrated circuit that connects the transistors to one another and to external connections.
INTERLAYER DIELECTRIC (ILD)
    • Films used between metal layers of an IC for insulation.
INTERMETAL DIELECTRIC (IMD)
    • Insulating films used between adjacent metal lines.
INVERTER
    • A device to convert DC power from solar panels, for example, to AC power compatible with grid electricity.
ION IMPLANTATION
    • A process technology in which ions of dopant chemicals (boron, arsenic, etc.) are accelerated in intense electrical fields to penetrate the surface of a wafer, thus changing the electrical characteristics of the material.
ITO (INDIUM TIN OXIDE)
    • A common TCO material.
J
JUNCTION
    • The interface between two semiconductor regions of differing dopant types. Usually refers to a p-n junction, at which the conductivity type changes from p-type to n-type.
JUNCTION BOX
    • In solar modules, an environmental enclosure designed to provide a connection point for the output of the module.
K
KERF LOSS
    • The amount of material loss during a cutting process. In silicon wafer production, kerf loss refers to the amount of silicon consumed as part of the wafering process and plays a vital role in determining the cost, edge quality, and surface finish of a wafer.
L
LASER SCRIBE
    • A technique that uses lasers to ablate the surface of a thin film PV cell in order to define interconnect patterns.
LATTICE
    • The orderly arrangement of atoms in a crystalline solid.
LINEWIDTH LIQUID CRYSTAL DISPLAY (LCD)
    • A type of flat panel display that uses an array of backlit thin film transistors to control a display process.
LITHO ENABLING
    • Any technique that enhance the resolution, fidelity or other aspect of the lithography process.
LITHOGRAPHY
    • The transfer of a pattern or image from one medium to another, such as from a photomask to a wafer using a stepper.
LOAD LOCKS
    • A chamber used to transfer a wafer or wafers between the atmospheric pressure of the FI and the vacuum environment used for processing.
LOW K
    • A dielectric material having relatively greater insulating ability than silicon dioxide (SiO2), usually with a k<3.5.
LOW PRESSURE CVD (LPCVD)
    • A CVD process performed in an environment below atmospheric pressure.
M
MASK
    • A patterned layer of material used to prevent the etching of the material directly beneath it. Also an abbreviation of PHOTOMASK.
MATERIAL CONTROL SYSTEM (MCS)
    • A computer controlled system which manages the transporting and storing of work in progress material in a manufacturing environment.
METALLIZATION
    • The CVD or PVD deposition of a layer of high-conductivity metal used to interconnect devices on a chip. Metals typically used include aluminum, tungsten and copper, etc.
METROLOGY
    • The science of measurement to ascertain dimensions, quantity, or capacity; the techniques and procedures for using sensors and measurement equipment to determine physical and electrical properties in wafer processing.
MICRO-CRYSTALLINE SILICON (µc-Si)
    • A form of thin film silicon with very small (0.5-2μm) silicon crystals intermixed with amorphous silicon. It is usually deposited in a thin layer (typically 1-3μm) for tandem (stacked) thin film solar cells.
MICRON
    • (µm or micrometer) A unit of length; one-millionth of a meter.
MICROPROCESSOR
    • An integrated circuit that contains arithmetic, logic and control circuitry in a single package.
MODULE
    • The solar module is the final packaged PV generator. In c-Si technologies, the module typically contains several dozen solar cells wired together.
MONOCYSTALLINE SILICON MOS (metal oxide semiconductor)
    • a structure obtained by growing a layer of silicon dioxide (SiO2) on top of a silicon substrate and then depositing a layer of metal or polycrystalline silicon (the latter is commonly used). Often used to describe a transistor fabricated in this way.
MOSFET
    • A type of FET where the gate is isolated by a shallow layer of insulator. Constructed using MOS fabrication techniques.
MULTICRYSTALLINE SILICON
    • In solar PV, a type of silicon wafer that is cast into ingots using grains of monocrystalline silicon. The ingots are then sliced into wafers and used in the manufacturing of microchips and photovoltaic cells.
N
NANOMANUFACTURING TECHNOLOGY
    • Solutions for the semiconductor, solar and display industries that are focused on dimensions smaller than 100nm.
NANOMETER (nm)
    • A unit of length; one billionth of a meter.
NMOS
    • A MOS transistor where the active carriers are electrons flowing between n-type source and drain regions in an electrostatically formed n-channel in a p-type silicon substrate.
NUCLEATION LAYER
    • A thin layer of film that promotes the growth of a subsequently deposited film.
O
OPTICAL PROXIMITY CORRECTION (OPC) ORGANIC LIGHT EMITTING DIODE (OLED)
    • A light-emitting device where photons are emitted as a result of electron-hole interactions in a thin film organic semiconductor.
P
PASSIVATION
    • A layer in a semiconductor device that forms a hermetic seal over the circuit elements, either as the final step in manufacturing or to protect chemically-active materials from reaction as wafers are transferred between processing tools. Plasma nitride and silicon dioxide are the materials primarily used for passivation.
PATTERNING
    • In semiconductor manufacturing, the creation of desired circuit geometry on a wafer. Generally used to refer to the combination of lithography and related processes such as patterning film deposition and etch.
PECVD (PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION)
    • A CVD process using plasma energy to drive the deposition. This technique allows lower deposition temperatures, increases film density and purity.
PELLICLE
    • A sheet of clear polymer that rides on a frame to protect the patterned region of a photomask from airborne contamination. During exposure, any contamination is held out of the focal plane and thus does not "print" on the wafer.
PHASE SHIFT MASK (PSM)
    • A photomask that take advantage of the interference generated by phase differences to improve image resolution in photolithography.
PHOSPHORUS-DOPED SILICATE GLASS (PSG)
    • An amorphous insulating material made by doping SiO2 with phosphorus to improve moisture resistance and reflow characteristics. Also called phosphosilicate glass.
PHOTOLITHOGRAPHY PHOTOMASK
    • A fused silica (quartz) plate, typically 152mm square, covered with a pattern of opaque, transparent and phase-shifting areas which will be projected onto wafers in the lithography process to define the layout of one layer of an integrated circuit.
PHOTORESIST
    • A light-sensitive organic polymer that is exposed by the lithography process, then developed to produce a pattern which identifies the areas of the underlying film to be etched.
PITCH
    • The distance between the centers of adjacent features, for example interconnect lines or contact holes.
PITCH-HALVING
    • Any patterning technique that creates paired, features from a single lithography image with a pitch half that of the original image, thus creating smaller patterns than the lithography process alone is capable of. Sometimes misleadingly referred to as pitch-doubling.
PLANARIZATION
    • The process by which an uneven wafer surface is made relatively flat using a low-selectivity etch or through CMP.
PLASMA
    • A gas in which a certain portion of the particles are ionized by, for example, a radio frequency energy field.
PMD (PRE-METAL DIELECTRIC)
    • Insulating layers deposited over the completed transistors at the end of FEOL processing upon which the first metal interconnect layer is formed.
PMOS
    • P-channel MOS transistor where the active carriers are holes flowing between p-type source and drain regions in an electrostatically formed p-channel in an n-type silicon substrate.
PNA (POST NITRIDATION ANNEAL)
    • An RTP step used to reduce leakage current without drive current loss after gate oxide nitridation in the creation of the gate stack.
POLYCIDE
    • A film stack commonly used for the gate electrode in DRAM fabrication, consisting of tungsten silicide on polysilicon.
POLYSILICON (POLY)
    • Polycrystalline silicon (or semicrystalline silicon, polysilicon, poly-Si, or simply "poly") is a material consisting of multiple small silicon crystals. Extensively used as conductor/gate materials in a highly doped state. Poly films are typically deposited by pyrolyzing silane using an LPCVD process.
PROCESS
    • An operation or group of sequential operations performed in the manufacture of an integrated circuit or other device.
PROCESS CHAMBER
    • An enclosed area in which a single process is performed in the manufacture of an integrated circuit or other device.
PROCESS INTEGRATION
    • Optimizing each process step to work correctly with the prior and subsequent steps in a sequential process flow.
PV (PHOTOVOLTAIC)
    • A process where light is converted to electricity. Solar PV is the generation of electricity from solar radiation.
PVB (POLYVINYL BUTYRAL)
    • A resin used in the manufacture of thin film PV modules. The PV circuit, formed on a sheet of glass, is covered in a sheet of PVB and then the back glass. This assembly is then laminated to encapsulate the circuit, protecting it from the environment.
PVD (PHYSICAL VAPOR DEPOSITION)
    • A process technology in which atoms of conducting material (aluminum, titanium nitride, etc.) are sputtered from a target of pure material, then deposited on the substrate to create the conducting circuitry within an integrated circuit or FPD.
R
R2R (RUN-TO-RUN CONTROL)
    • An APC technique that allows modification of a processing parameters between machine "runs" to minimize variability.
RADIO FREQUENCY (RF)
    • Electromagnetic radiation with frequencies ranging from approximately 3 kHz to 300 GHz.
RAMAN SPECTROSCOPY
    • A spectroscopic method of chemical analysis that relies on the inelastic (Raman) scattering of monochromatic light. Enables real-time reaction monitoring and characterization of compounds in a non-contact manner.
RENEWABLE ENERGY STANDARD (RES) RENEWABLE PORTFOLIO STANDARD (RPS)
    • A regulation that requires the increased production of energy from renewable energy sources, such as wind, solar, biomass, and geothermal. Another common name for the same concept is renewable electricity standard (RES).
RETICLE
    • A flat, transparent plate, used in a stepper that contains the image of wafer patterns to be reproduced on a wafer. Often used interchangeably with photomask.
RIE (REACTIVE ION ETCH)
    • An etching technology that uses chemically reactive plasma to remove material deposited on wafers. High-energy ions from the plasma react with material on the wafer surface.
RTP (RAPID THERMAL PROCESS)
    • A process in which a wafer is heated to a specified temperature for short periods of time.
S
SACVD (SUB-ATMOSPHERIC CHEMICAL VAPOR DEPOSITION)
    • A term coined by Applied Materials to describe CVD processes performed slightly below atmospheric pressure using TEOS/ozone chemistry.
SADP (SELF-ALIGNED DOUBLE PATTERNING)
    • A double patterning technique employing sacrificial sidewall spacer films to achieve pitch-halving. Also known as sidewall spacer double patterning(SSDP) or spacer defined double patterning (SDDP).
SALICIDE
    • A contraction of self-aligned silicide. Salicide processing technology seeks to exploit the principle that a refractory metal deposited on a patterned silicon substrate will selectively react with exposed silicon under specific processing conditions, and will not react with adjacent materials, such as silicon oxide material. Thus, no patterning step is required.
SCANNING ELECTRON MICROSCOPE (SEM)
    • A microscope that uses an electron beam rather than light to illuminate the sample. The beam is scanned back and forth across the sample surface.
SEED LAYER
    • A nucleation layer where the nucleation material is the same as the subsequently deposited film.
SELECTIVITY
    • The ratio of etch rates observed in two materials during etch processing. Typically used to refer to the relative etch rates of a material intended for removal and the mask, and an important metric of etch pattern fidelity.
SEMICONDUCTOR
    • A material whose electrical conductivity is intermediate between that of metals (conductors) and insulators (non-conductors) and can be modified physically or chemically to increase or decrease its conductivity by the addition of dopants.
SILANE (SiH4)
    • A gas that readily decomposes into silicon and hydrogen, silane is often used to deposit silicon-containing compounds. It also reacts with ammonia to form silicon nitride, or with oxygen to form silicon dioxide.
SILICIDE
    • A compound of silicon with a more electropositive element. Nickel, tantalum, titanium and cobalt silicide films are used to create ohmic (low-resistivity) contacts for transistor connections. Molybdenum silicide is commonly used as a light-absorbing layer in photomasks. Tungsten silicide (polycide) is used for DRAM gate electrodes.
SILICON DIOXIDE (SiO2)
    • The most common dielectric material used in semiconductor manufacturing, due to its versatility and stability. Also known simply as "oxide", it can be grown direction on silicon wafers via thermal oxidation or deposited via PECVD or HDP-CVD processes.
SILICON NITRIDE (Si3N4)
    • A silicon/nitrogen film dielectric deposited using plasma-enhanced or LPCVD. Sometimes loosely referred to as SiN.
SINGLE JUNCTION SIP (SELF-IONIZED PLASMA)
    • A high-power magnetron source for PVD processes which imparts sufficient energy to the plasma such that the sputtered metal atoms are ionized. The metal ions can then be accelerated towards the wafer using an electric field, creating a more directional deposition pattern and thus higher step coverage in small geometry structures.
SLURRY
    • In semiconductors, a suspension of abrasive solids in a liquid used for CMP processes. In PV, used as the abrasive medium in a wire saw for wafering.
SOI (SILICON-ON-INSULATOR)
    • The use of a layered silicon-insulator-silicon substrate in semiconductor manufacturing. SOI substrates provide reduced parasitic capacitance between adjacent devices in an integrated circuit as compared to devices built into bulk wafers, enabling reduced power consumption and thus higher device performance.
SOLAR CELL
    • A device that converts the energy of sunlight directly into electricity by the photovoltaic effect. Multiple cells are wired together to form modules.
SOLAR FARM
    • A utility-scale photovoltaic power station.
SOURCE
    • The input terminal of a FET.
SPC (STATISTICAL PROCESS CONTROL)
    • A method for improving quality control in manufacturing by applying statistical techniques to the monitoring and control of a process.
SPUTTERING
    • A method of depositing a film where atoms are ejected from a solid target material due to bombardment of the target by energetic particles.
SRU (SLURRY RECOVERY UNIT)
    • A machine used in wafering and CMP that processes used slurry in order to recover material such as abrasives and cooling for subsequent recycling.
STEPPER
    • Equipment used to transfer a reticle (photomask) pattern onto a wafer. The same pattern is transferred onto each die on the wafer.
STI (SHALLOW TRENCH ISOLATION)
    • A technique to isolate each transistor or memory cell from its neighbors in order to prevent current leakage. The technique employs a pattern of trenches etched in the silicon, filled with an insulating material such as silicon dioxide.
STRAIN ENGINEERING
    • Processes used in semiconductor manufacturing that introduce stress into transistors and memory cells by distorting the crystal lattice. In logic, this enables electricity to move more easily through the transistor, increasing transistor performance. In memory, strain can also reduce leakage current, allowing higher cell densities.
SUBSTRATE
    • The material upon which thin films are manipulated. Silicon is most commonly used for semiconductors and c-Si PV cells. Glass is commonly used for LCD and thin film PV applications.
T
TANDEM JUNCTION
    • A solar PV cell type that uses multiple light converting materials to increase conversion efficiency. Tandem junction thin film silicon cells, for example, use amorphous silicon and microcrystalline layers.
TCO (TRANSPARENT CONDUCTIVE OXIDE)
    • Doped metal oxide films used in optoelectronic devices such as flat panel displays, touch panels and photovoltaics. In LCDs, TCO layers form the electrodes that generate the electric field to polarize the liquid crystal. In touch panels, TCO layers are used for the sensing electrodes. In PV, the TCO forms the top electrode of the cell.
TEM (TRANSMISSION ELECTRON MICROSCOPE)
    • A transmission electron microscope that transmits a beam of electrons through an ultra-thin specimen. It operates on the same basic principle as the optical microscope by with much higher resolution.
TEOS
    • A liquid source for oxide deposition, Tetraethyl orthosilicate is the chemical compound with the
      formula Si(OC2H5)4.
THIN FILM
    • A layer of material ranging from fractions of a nanometer to several micrometers thick.
THIN-FILM TRANSISTOR (TFT)
    • A MOSFET manufactured with thin film technology, used primarily in the manufacturing of active matrix LCDs.
THROUGHPUT
    • The number of wafers a tool can process per hour.
TOOL
    • A term used to refer to a piece of semiconductor processing equipment.
TOPOGRAPHY
    • In semiconductor, non-planarity generated by the fabrication of features on the wafer surface. This can have significant effects on the patterning of subsequent layers because the limited depth of field of the stepper optical system may cause parts of the pattern to be out of specification. Also used to describe non-uniformity induced by different material removal rates in CMP.
TRACK
    • A tool that integrates several steps needed to process photoresist (deposition, soft bake, exposure, developing, hard bake) in semiconductor manufacturing.
TRANSISTOR
    • A semiconductor device used to switch and amplify electronic signals that serves as the basic element of a integrated circuit.
TRENCH
    • A groove etched in a wafer to be used as part of a device structure.
TRENCH CAPACITOR
    • A capacitor built into a trench on the substrate. This technique allows capacitance can be increased without increasing the area on the wafer needed to form the capacitor.
U
ULTRA-SHALLOW JUNCTION (USJ)
    • An area of semiconductor manufacturing that is focused on reducing the thickness of the junctions that form the source and drain regions of advanced transistors in order to improve performance while maintaining acceptable leakage current and breakdown voltage.
USG (Undoped silicate glass)
    • An insulating film often used for PMD and ILD applications typically deposted using SACVD or HDP-CVD.
V
VIAS
    • Vertical pathways through dielectric layers that make electrical connections between interconnect layers.
W
WAFER
    • The thin, circular or nearly square slices of mono- or multicrystalline silicon on which semiconductors and PV cells are built.
WAFERING
    • The process of dividing silicon ingots or bricks into wafers.
WEB
    • Another name for roll-to-roll coating technology, where thin films of material are deposited on rolls of flexible material.
WET CLEAN
    • A process for removing unwanted material or contaminants from substrates using liquid chemistry between process steps.
WIRE SAW
    • A machine that uses a moving wire to slice monocrystalline silicon ingots and polycrystalline bricks into wafers.
Wp
    • Watt peak, a solar industry unit for the power of a solar cell delivered under ideal irradiation conditions.
Y
YIELD
    • The percentage of product (e.g. wafers or die) produced in a process that conforms to specifications.
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